New Cadence UltraLink D2D PHY IP for Die-to-Die Connectivity Enables High-Performance Applications with Cost-Effective Packaging
(World News Science)

Highlights Silicon proven and prime for customer engagements today Supports multi-chip module SoCs on organic substrates 40Gbps wire speed delivers up to 1Tbps/mm unidirectional bandwidth Achieves better than 10-15 BER without requiring FEC Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced the Cadence® UltraLinkTM D2D PHY IP, a high-performance, low-latency PHY for die-to-die connectivity targeted at the AI/ML, 5G, cloud computing and networking...